Conventionally, an integrated circuit device receives power from a power supply and ground via a connection to Vss. Normally, the power and ground connections are connected to the integrated circuit device through power and ground planes.
One issue with power and ground planes in modern integrated circuit devices is that they contribute to inductive ringing. In memory devices, ringing due to package self-inductance can slow down the external interface. It is very desirable to minimize the inductive path for the power supply and ground connections to improve the performance of the integrated circuit.
Inductive ringing has been addressed previously by increasing the number of power and ground lines such that each line handles a reduced capacitive load. However, increasing the number of lines may contribute to increased package size, which may also be undesirable. Conventional power supply and ground planes are positioned on the semiconductor die contributing to larger die size. It is desirable to minimize, to the greatest possible extent, the die size to enable smaller integrated circuit devices to be produced.
Another issue with power supply and ground planes is the necessity to provide capacitive decoupling. Commonly, decoupling capacitors are used to provide the necessary decoupling for the integrated circuit device. Again, these decoupling devices add to cost and size.
As integrated circuits shrink, the importance of reducing package inductance will be even greater. Thus, there is a need for techniques to reduce package inductance.